A 0.15-µm FD-SOI Substrate Bias Control SRAM with Inter-Die Variability Compensation Scheme
نویسندگان
چکیده
We propose a novel substrate-bias control scheme for an FD-SOI SRAM that suppresses inter-die variability. The proposed circuits detect inter-die threshold-voltage variation automatically, and then maximize read/write margins of memory cells to supply the substrate bias. We confirmed that a 486-kb 6T SRAM operates at 0.42 V, in which an FS corner can be compared as much as 0.14 V or more. key words: SRAM, FD-SOI, Inter-die variation
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ورودعنوان ژورنال:
- IEICE Transactions
دوره 95-C شماره
صفحات -
تاریخ انتشار 2012